Verification Engineer jobs - California
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Featured Job Postings from the Web
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| May 25 | Staff Verification Engineer-Complex Connectivity Chips | Fabless Semiconductor - Location / Wifi / Bluetooth | San Diego, CA |
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Staff Verification Engineer - Complex Connectivity Chips Position is in Sunnyvale Calif ... are looking for a first class Staff Design Verification Engineer to be part of front end... more |
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| May 25 | ASIC Design Verification Engineer (4250) | QLogic | California |
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We have an immediate need for ASIC Verification professionals based out of our ... opportunity to add new skills in the timely verification of a complex System-On-a-Chip. more |
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| May 25 | ASIC Design Verification Engineer (4255) | QLogic | California |
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We have an immediate need for ASIC Verification professionals based out of our ... opportunity to add new skills in the timely verification of a complex System-On-a-Chip. more |
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| May 25 | ASIC Verification Engineer (4234) | QLogic | Sacramento, CA |
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We have an immediate need for ASIC Verification professionals based out of our ... opportunity to add new skills in the timely verification of a complex System-On-a-Chip. more |
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| May 24 | Senior Engineer Job | Akamai Technologies | San Mateo, CA |
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Senior Engineer Location: US-CA-San Mateo Posted Date: 5/24/2012 Cost Center: 264 Category ... - Minimum of 2 years of excellent fundamentals in verification techniques such as black /... more |
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| May 23 | ELECTRICAL ENGINEER VI (DIGITAL) | General Atomics | Poway, CA |
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for digital circuit timing design and verification and controlled impedances of digital lines on printed circuit boards. Responsible for documentation necessary to support... more |
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| May 23 | ENGINEER VI (PROJECT ENGINEERING SUPERVISOR) | General Atomics | Adelanto, CA |
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support for design reviews, coordination of verification and validation efforts, and support for design changes and productionization. 2. Project Engineering - provide technical... more |
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| May 21 | Staff II IC Design / Verification Engineer | Broadcom | Irvine, CA |
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and data in handheld devices. Our design verification team supports multiple lines of ... verification testplan - Developing verification environment and test suites for... more |
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| May 16 | IC Design Verification for Mobile Platforms | Broadcom | Sunnyvale, CA |
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and data in handheld devices. Our design verification team supports multiple lines of ... verification testplan - Developing verification environment and test suites for... more |
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| May 16 | Verification Design engineer | Apolent | San Jose, CA |
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functional and Design for Test feature verification of high speed Microprocessor ... set. Participate in development of formal verification techniques. Resolve all... more |
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| May 16 | Senior SW Development Engineer, Advanced Emulation/Co-Simulation | Cadence Design Systems | San Jose, CA |
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Responsibilities include working on Virtual Verification Machine (VVM or SWIT) and VIP ... EDA/CAD tool development experience or logic design verification experience expected... more |
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| May 15 | Hardware Design Digital Verification Engineer [RM] | Rjt Compuquest | San Diego, CA |
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Title: Hardware Design Digital Verification Engineer Duration: 6-12 months (extendable Contract) Location: San Diego-CA Description: Ten years or more of hands-on electronic... more |
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| May 15 | senior software engineer | Cadence Design Systems | San Jose, CA |
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next generation of IC manufacturing verification software toools for IC ... Previous experience with IC physical layout design/verification tool development is requir... more |
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| May 07 | FPGA Design / Verification Engineer | Activesoft | Mountain View, CA |
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3+ years Verilog design experience, including timing analysis and timing closure RTL functional simulation and debug Functional test plan and test writing experience in system... more |
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| May 02 | Design Verification Engineer | Insys | San Jose, CA |
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position. Required Qualifications: - Design verification engineer who know System Verilog ... Candidate Name: Degree Major: Total Design Verification Engineer exp: Total exp in... more |
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| May 02 | Urgent Requirement- Hardware Verification Engineer-6 months | Silverlink Technologies | Folsom, CA |
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urgent requirement for Hardware Verification Engineer Please find the details of the ... below. Position: Hardware Verification Engineer Duration: 6 months Location: Folsom,... more |
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| Apr 30 | Manager, IC Design/Verification | Broadcom | San Diego, CA |
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design verification manager Your individual verification responsibility will include: - ... verification testplan - Developing verification environments and test suites for... more |
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| Apr 17 | ASIC Verification Design Consultant | Silverlink Technologies | San Jose, CA |
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Position: ASIC Verification Design Consultant Duration: 6 Months / Full Time Location: San ... in ASIC Verification - Expertise in ASIC Verification, Module level & Chip level,... more |
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| Apr 15 | Engineering / Design, Verification & Testing | Emulex | Costa Mesa, CA |
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Get involved: Designs, develops and executes the hardware, software, and firmware automated tests to meet product requirements. Designs test and diagnostic programs, designs test... more |
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| Apr 12 | Technical Marketing Engineer | Cadence Design Systems | San Jose, CA |
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campaigns, etc.) for hardware-assisted verification products * Works closely with ... ASIC/SoC verification process and low power verification is a plus * Attentiveness to... more |
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| Apr 10 | Multimedia Design Verification Engineer | QUALCOMM | Santa Clara, CA |
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CA or Santa Clara, CA As a Verification Engineer, you will be responsible for ... for mobile applications.As a Verification Engineer, you will be responsible for... more |
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| Apr 09 | Senior Verification Methodology Engineer - AMS | Fabless Semiconductor - Location / Wifi / Bluetooth | Los Angeles, CA |
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applications. We are looking for a Senior Verification Methodology Engineer to work ... The primary job purpose of a Senior Verification Methodology Engineer within R&D... more |
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| Feb 07 | Sr Application Engineer , Physical IC | Cadence Design Systems | San Jose, CA |
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highly desirable. Good knowledge of Physical Verification tools and rule decks is highly desirable. Exposure to digital P&R is a plus. MUST HAVE CURRENT US WORK AUTHORIZATION... more |
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| Jan 13 | Staff Design Engineer, Physical Design | Cadence Design Systems | San Jose, CA |
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power/signal integrity signoff, physical verification, DRC/LVS /Antenna) EM/IR ... EM/IR-Drop/crosstalk analysis, formal verification, physical verification, DFM. more |
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| Dec 13 | Sr Design Verification Engr | Cadence Design Systems | San Jose, CA |
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verification environments including advanced verification component development, ... verification, preferably using Metric Driven Verification (MDV) methodologies The... more |
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More Job Postings from the Web
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| May 28 | Digital Design Verification Engineer | Artisan | San Jose, CA |
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writing/modifying RTL Code, Synthesis and Verification for an Embedded Microcontroller ... experience in Digital Logic Design and Verification Must possess extensive previous... more |
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| May 26 | Product Verification Engineering Intern - Summer | Spirent Communications | Calabasas, CA |
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of Experience. We are looking for a Product Verification Intern to join our Calabasas ... product requirements. * Understand Product Verification automated test environment,... more |
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| May 25 | Verification Engineer (Verilog) | eTech Resources | San Jose, CA |
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Description: Job Title: Hardware Engineer #5838 Santa Clara, CA 52 Week Contract Primary Skill: FPGA Travel required: None Telecommuting: No Years of Experience & Expertise Level:... more |
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| May 25 | Senior Staff CPU Verification Engineer | Broadcom | Santa Clara, CA |
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a new architecture/micro-architecture on the verification environment Understand ... knowledge and understanding of different verification methodologies: - architecture vs... more |
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| May 25 | ASIC Verification Engineer | Brocade Communications Systems | San Jose, CA |
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several complete and successful ASIC design/verification cycles from architecting and ... Qualifications: Education and Experience: 7+ years of ASIC design/verification experience... more |
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| May 25 | Hardware Verification Engineer | Volt Information Sciences | Santa Clara, CA |
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semiconductor client is seeking a Hardware Verification Engineer who will work on ... largely assisting the Front-end Pre-silicon Verification efforts. In todays job market,... more |
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| May 24 | Sr Staff Engineer-Verification | CSR | Sunnyvale, CA |
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knowledge of High-level constrain-random verification using SystemVerilog, SystemC, ... for a first class Design Verification Engineer to be part of front end digital... more |
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| May 22 | Staff Verification Engineer | I-hire | San Jose, CA |
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for a highly qualified senior verification engineer to lead development of memory ... bull; BS/MS EE, CE, or CS bull; 8+ years of design verification experience bull; 2+ years... more |
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| May 22 | ASIC Verification Engineer, Staff | Infinera | Sunnyvale, CA |
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ASIC Verification Engineer, Staff Job Description: * The successful candidate will ... tools; familiarity with evolving verification methodologies. * Very good... more |
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| May 21 | Verification Engineer | Synergy Seven | Folsom, CA |
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Verification Engineer This is a contract role at our client, a leading semiconductor ... yrs) in defining, implementing and deploying verification capabilities and methodologies -... more |
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| May 21 | Functional Verification Engineer | Encore Semi | San Jose, CA |
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California. Responsibilities: As Functional Verification Engineer, you will be ... Assertions, simulation, formal verification, HW-SW co-verification and constraint/HVL-base... more |
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| May 17 | System Verification Engineer, Senior-IEB-Hardware (772953) Job | Microsoft | Mountain View, CA |
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experience CPU core or Graphics core verification Emulation and hardware ... experience Performance modeling and architectural verification experience SC:APA... more |
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| May 16 | ASIC Verification Engineer | Xilinx | San Jose, CA |
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Work as an ASIC verification engineer building the next generation programmable ... and Verification IPs As a member of the verification team you will be responsible for... more |
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| May 16 | Software Verification Engineer | Collabera | California |
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Job Details: Job Title: Software Verification Engineer III Location: Santa Clara, CA 95054 Duration: 12+ months (Strong possibility for extension) Job Description / Requirement:... more |
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| May 16 | Design Verification Engineer | LSI | Milpitas, CA |
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The Custom Solutions ASIC Development Engineer is a challenging position that ... Working knowledge of VMM and/or UVM SystemVerilog verification methodologies... more |
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| May 16 | Engineer, Verification | Marvell Technology Group | Santa Clara, CA |
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to participate in developing advance verification environment for IPs and SoC test ... tools, methodologies and flows. Perform verification tasks for IPs and SoC test... more |
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| May 15 | z Verification Engineer / Posted 2-26-12 | Formalized Design | Folsom, CA |
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formalized.com Contract Title: Verification Engineer / 150668 Contract ... in defining, implementing and deploying verification capabilities and methodologies *... more |
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| May 15 | Verification and Validation Research Engineer | Toyota | Gardena, CA |
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Planning Center. This position is for a Verification and Validation Research Engineer ... * Experience with formal verification * Project / Team leadership experience * Knowledge o... more |
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| May 14 | Design Verification Engineer | Experis | San Jose, CA |
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Engineering is seeking a Design Verification Engineer . The ideal Engineer will be ... team * Write verification specifications, verification plans, and documentation *... more |
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| May 14 | Verification Engineer II (NCG) | SanDisk | Milpitas, CA |
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will participate in the logic design and verification of NAND Flash memory products. ... Responsibilities include: RTL and Gate level simulation/verification... more |
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| May 14 | Principal/Senior Principal Verification Engineer (Processor Emulation) | Applied Micro Circuits | Sunnyvale, CA |
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verification, multiprocessor cache subsystem verification, and/or SoC verification * ... * BSEE/MSEE with 12+ years experience in design verification, simulation environment (Axis... more |
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| May 12 | Design Verification Engineer | Apple | Cupertino, CA |
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systems in C/C++/assembly. Familiarity with verification environments, VMM, System ... Clear understanding of constrained random verification process, functional coverage,... more |
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| May 12 | ASIC Verification Engineer | AMD | Sunnyvale, CA |
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Verification Engineer - Graphics We are accepting applications for engineers at all levels ... This position is for a verification engineer in AMD's graphics group working on... more |
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| Apr 17 | Design Verification Engineer / ASIC | QUALCOMM | San Diego, CA |
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C++ / Verification Engineer Experienced chip verification engineer responsible for ... of design for verification methodologies. Verification components to be developed may... more |
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| Mar 27 | Verification Engineer | eTech Recruiters, Inc. Dba eTech Resources. | Folsom, CA |
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Verification Engineer 3 month contract with option to extend Folsom, CA Primary Skill: ... regression failures Necessary Skills: Logic verification skills System Verilog/Verilog... more |
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